Mill Computing
Realizes: experimental compiler-rich compute
Mill's architecture merges a belt machine register model with VLIW-style wide-issue and deeply pipelined stages to pursue high efficiency and sustained throughput, relying on a compiler-centric workflow to schedule operations on the belt.
Examples
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Mill Computing prototype board
Prototype research board used to evaluate the Mill belt machine and wide-issue pipeline for compiler-rich workloads.
Measure latency and throughput of compiler-scheduled server workloads on the Mill research platform.